One of the characteristics of an analogue digital converter is its sampling frequency, in other words the number of digital samples of an analogue signal that it is capable of producing per unit time. In particular, each analogue digital converter comprises a clock outputting a signal controlling the frequency at which digital samples are produced. Therefore the maximum sampling frequency forms an intrinsic limit to an analogue digital converter. When it is required to sample at a high frequency, typically of the order of one Gigahertz, an analogue digital converter with a corresponding sampling frequency can be chosen provided that a component with such a characteristic is available. The cost of such a component depends particularly on its maximum sampling frequency and increases with this frequency.
Another solution that groups time interleaved analogue digital converters in common, is to make a number N of analogue digital converters operate in parallel, each then using a clock with a frequency N times lower than the required sampling frequency Fe. The clock of each analogue digital converter is offset in time compared with the clock of the analogue digital converter preceding it by a required sample clock period Fe. The result is the equivalent of a converter operating at the required sampling frequency Fe with N analogue digital converters in parallel each operating at a sampling frequency
            F      e        N    .This solution requires a large similarity of characteristics of analogue digital converters. The characteristics that must be very similar include particularly the offset voltage and gain of the digital output signal from each analogue digital converter. Furthermore, the clocks of the analogue digital converters must be precisely synchronized to sample at the required time. The passband of the analogue signal that an analogue digital converter is capable of receiving at the input must also be the same for all the analogue digital converters.
Therefore, it is particularly complex and difficult to combine all these conditions. Disparities between analogue digital converters lead to the occurrence of errors in the digital output signal. Therefore the digital output signal from time interleaved analogue digital converters is significantly degraded.
However, it is still possible to partially correct this type of error by known digital filtering techniques. However, these filtering techniques require an initialization phase, in which errors are made on the digital output signal from analogue digital converters. Once the error has been partly characterized after the initialization phase, digital filtering means are used to correct the digital output signal. But these digital filtering means are not well adapted to frequency variations and variations in the input signal level during time, particularly if these variations are fast, which is the case for signals with a wide range.